CLC3790093

The CLC3790093 Data Capture Board enables simple evaluation of National Semiconductor's High Speed Analog to Digital Converters (ADCs) and the Diversity Receiver Chip Set (DRCS). The Data Capture Board interfaces the outputs of these devices to the standard serial port available on the back of most Personal Computers (PCs). We have provided PC software to control the data capture function and Matlab® scripts for data analysis. A block diagram of the evaluation test bed is shown below. The Data Capture Board contains a field-programmable gate array (FPGA) that controls its operation. An EPROM configures the FPGA after power is applied. The serial interface CLC3790093 is provided by a UART (Universal Asynchronous Receiver/Transmitter), an oscillator, and a level translator IC. The captured data is stored in either three 32K x 8 static RAMs (organized into 24-bit words) or in a FIFO containing 32K 18-bit words. LEDs provide a visual indication of activity. DIP switches and a jumper configure several capture functions.