Features: 8 ,DSP . SRAM X-Y Y-X 64PinoutSpecifications
CH421: Features: 8 ,DSP . SRAM X-Y Y-X 64PinoutSpecifications
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Description CH421 is a two-way data buffer interface chip. CH421 has X and Y two 8-bit passive parallel port, through the XY and YX data transmission directions of the two 64-byte data buffer. It can achieve X and Y side end a two-way asynchronous data exchange between. CH421 supports simultaneous operation of both ends for connecting single-chip microcontroller, MCU and DSP / MCU, and the MCU and other host with active parallel interface, such as the computer's printer port or CH365 local ports. The figure for general application diagram. Customers Who Bought This Item Also Bought
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