CDS-1402

Features: ` Use with 10 to 14-bit A/D converters` 5 Megapixels/second minimum throughput (14 bits)` ±2.5V input/output ranges, Gain = 1` Low noise, 200µVrms` Two independent S/H amplifiers` Gain matching between S/H's` Offset adjustments for each S/H` Four external A/D control lines` Small p...

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CDS-1402 Picture
SeekIC No. : 004312510 Detail

CDS-1402: Features: ` Use with 10 to 14-bit A/D converters` 5 Megapixels/second minimum throughput (14 bits)` ±2.5V input/output ranges, Gain = 1` Low noise, 200µVrms` Two independent S/H amplifiers` Ga...

floor Price/Ceiling Price

Part Number:
CDS-1402
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/27

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Product Details

Description



Features:

` Use with 10 to 14-bit A/D converters
` 5 Megapixels/second minimum throughput (14 bits)
` ±2.5V input/output ranges, Gain = 1
` Low noise, 200µVrms
` Two independent S/H amplifiers
` Gain matching between S/H's
` Offset adjustments for each S/H
` Four external A/D control lines
` Small package, 24-pin ceramic DDIP
` Low power, 350mW
` Low cost



Specifications

PARAMETERS
LIMITS
UNITS
+5V Analog Supply (Pin 24)
5V Analog Supply (Pin 13)
+5V Digital Supply (Pin 16)
Digital Inputs (Pins 11, 12)
Analog Inputs (Pins 3, 4)
Lead Temperature (10 seconds)
0 to +6.3
0 to 6.3
0.3 to +6
0.3 to +VDD +0.3
±3.2
+300
Volts
Volts
Volts
Volts
Volts
°C



Description

The CDS-1402 is an application-specific, correlated double sampling (CDS) circuit designed for electronic-imaging applications that employ CCD's (charge coupled devices) as their photodetector. The CDS-1402 has been optimized for use in digital video applications that employ 10 to 14-bit A/D converters. The low-noise CDS-1402 can accurately determine each pixel's true video signal level by sequentially sampling the pixel's offset signal and its video signal and subtracting the two. The result is that the consequences of residual charge, charge injection and low-frequency "kTC" noise on the CCD's output floating capacitor are effectively eliminated. The CDS-1402 can also be used as a dual sample-hold amplifier in a data acquisition system.

The CDS-1402 contains two sample-hold amplifiers and appropriate support/control circuitry. Features include independent offset-adjust capability for each S/H, adjustment for matching gain between the two S/H's, and four control lines for triggering the A/D converter used in conjunction with the CDS-1402. The CDS circuit's "pingpong" timing approach (the offset signal of the "n+1" pixel can be acquired while the video output of the "nth" pixel is being converted) guarantees a minimum throughput, in a 14-bit application, of 5MHz. In other words, the true video signal (minus offset) will be available




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