CD74HCT574-Q1

Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . .±20 mA
Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V) . . . . . . . . . .±20 mA
Drain current per output, IO (VO > −0.5 V or VO < VCC + 0.5 V) . . . . . . . . ±35 mA
Output source or sink current per output, IO (VO > −0.5 V or VO < VCC + 0.5 V) ±25 mA
Continuous current through VCC or GND, ICC . . . . . . . . . . . . . . . . . . . . . .  ±50 mA
Package thermal impedance, JA (see Note 2): M package . . . . . . . . . . . . 58°C/W
                                                                          PW package . . . . . . . . . . . 69°C/W
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  150°C
Lead temperature (during soldering):
At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max . . . 300°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

† Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages referenced to GND unless otherwise specified.
2. The package thermal impedance is calculated in accordance with JESD 51-7.

The CD74HCT574 is an octal D-type flip-flop with 3-state outputs and the capability to drive 15 LSTTL loads.The eight edge-triggered flip-flops enter data into their registers on the low-to-high transition of the clock (CP).CD74HCT574-Q1 output enable (OE) controls the 3-state outputs and is independent of the register operation. When OE is high, the outputs are in the high-impedance state.