Flip Flops Hi-Spd CMOS Dual Neg J-K Flip-Flop
CD74HC73EE4: Flip Flops Hi-Spd CMOS Dual Neg J-K Flip-Flop
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Number of Circuits : | 2 | Logic Family : | 74HC | ||
Logic Type : | J-K Flip-Flop | Polarity : | Inverting/Non-Inverting | ||
Input Type : | Single-Ended | Output Type : | Differential | ||
Propagation Delay Time : | 160 ns | High Level Output Current : | - 5.2 mA | ||
Low Level Output Current : | 5.2 mA | Supply Voltage - Max : | 6 V | ||
Maximum Operating Temperature : | + 125 C | Mounting Style : | Through Hole | ||
Package / Case : | PDIP-14 | Packaging : | Tube |
Technical/Catalog Information | CD74HC73EE4 |
Vendor | Texas Instruments |
Category | Integrated Circuits (ICs) |
Mounting Type | Through Hole |
Package / Case | 14-DIP (300 mil) |
Function | Reset |
Number of Bits per Element | 1 |
Number of Elements | 2 - Dual |
Current - Output High, Low | 5.2mA, 5.2mA |
Output Type | Differential |
Trigger Type | Negative Edge |
Type | JK Type |
Packaging | Tube |
Operating Temperature | -55°C ~ 125°C |
Delay Time - Propagation | 13ns |
Frequency - Clock | 60MHz |
Voltage - Supply | 2 V ~ 6 V |
Drawing Number | 296; 4040049; N; 14, 16, 18, 20 |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | CD74HC73EE4 CD74HC73EE4 |