CD74HC597M

Counter Type :
Output Type :
Package / Case : SOIC-16
Maximum Operating Temperature : + 125 C
Minimum Operating Temperature : - 55 C
Logic Family : 74HC
Counting Sequence : Serial/Parallel to Serial
Logic Type : CMOS
Packaging : Tube
Number of Circuits : 2
Number of Input Lines : 3
Propagation Delay Time : 240 ns, 48 ns, 41 ns


Features:

• Buffered Inputs
• Asynchronous Parallel Load
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^.C to 125^.C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of V_CC at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, Il 1A at V_OL, V_OH


Pinout




Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . ±20mA
DC Output Diode Current, IOK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . ±20mA
DC Drain Current, per Output, I_O
For -0.5V < V_O < V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . ±25mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . ±50mA


Description

The 'HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR) clears the shift register. CD74HC597MSerial input data can also be synchronously shifted through the shift register when PL is high.

Parameters:

Technical/Catalog Information	CD74HC597M
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Logic Type	Shift Register
Function	Parellel to Serial
Number of Elements	1 - Single
Number of Bits per Element	8
Output Type	Standard
Voltage - Supply	2 V ~ 6 V
Mounting Type	Surface Mount
Package / Case	16-SOIC (3.9mm Width)
Packaging	Tube
Operating Temperature	-55°C ~ 125°C
Drawing Number	296; 4040047-4; D; 16
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CD74HC597M CD74HC597M