CD74HC393

Features:

• Fully Static Operation
• Buffered Inputs
• Common Reset
• Negative-Edge Clocking
• Typical f_MAX = 60 MHz at V_CC = 5V, C_L = 15pF,T_A = 25oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30%of V_CC at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (M_ax), VIH = 2V (M_in)
- CMOS Input Compatibility, I_l £Aat V_OL, V_OH



Pinout




Specifications

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC or I_GND . . . . . . . . . . . . . . . . .±50mA



Description

   The Harris CD74HC393 and CD74HCT393 are 4-stage ripple-carry binary counters. Al counter stages are masterslave flip-flops. The state of the stage advances one count on the negative transition of each clock pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.