CD74HC173M

Maximum Operating Temperature : + 125 C
Mounting Style : SMD/SMT
Polarity : Non-Inverting
Input Type : Single-Ended
Output Type : Single-Ended
Packaging : Tube
Logic Type : D-Type Flip-Flop
Number of Circuits : 4
Logic Family : 74HC
Propagation Delay Time : 200 ns
High Level Output Current : - 7.8 mA
Low Level Output Current : 7.8 mA
Supply Voltage - Max : 6 V
Package / Case : SOIC-16


Features:

• Three-State Buffered Outputs
• Gated Input and Output Enables
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH


Pinout




Specifications

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . .. . . . -0.5V to 7V
DC Input Diode Current, I_IK
For VI < -0.5V or VI > V_CC + 0.5V . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I_OK
For VO < -0.5V or VO > V_CC + 0.5V . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < V_CC + 0.5V . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, I_CC . . . . . . . . . . . . . . . . . .. . .±70mA


Description

The 'HC173 and 'HCT173 high speed three-state quad Dtype flip-flops are fabricated with silicon gate CMOS technology. They possess the low power consumption of standard CMOS Integrated circuits, and can operate at speeds comparable to the equivalent low power Schottky devices. The buffered outputs can drive 15 LSTTL loads.

The large output drive capability and three-state feature make these parts ideally suited for interfacing with bus lines in bus oriented systems. The four D-type flip-flops operate synchronously from a common clock. The CD74HC173M outputs are in the three-state mode when either of the two output disable pins are at the logic "1" level. The CD74HC173M input ENABLES allow the flip-flops to remain in their present states without having to disrupt the clock If either of the 2 input ENABLES are taken to a logic "1" level, the Q outputs are fed back to the inputs, forcing the flip-flops to remain in the same state. Reset is enabled by taking the MASTER RESET (MR) input to a logic "1" level. The data outputs change state on the positive going edge of the clock.

The 'HCT173 logic family is functionally, as well as pin compatible with the standard LS logic family.

Parameters:

Technical/Catalog Information	CD74HC173M
Vendor	Texas Instruments
Category	Integrated Circuits (ICs)
Mounting Type	Surface Mount
Package / Case	16-SOIC (3.9mm Width)
Function	Master Reset
Number of Bits per Element	4
Number of Elements	1 - Single
Current - Output High, Low	7.8mA, 7.8mA
Output Type	Tri-State Non Inverted
Trigger Type	Positive Edge
Type	D-Type
Packaging	Tube
Operating Temperature	-55°C ~ 125°C
Delay Time - Propagation	17ns
Frequency - Clock	60MHz
Voltage - Supply	2 V ~ 6 V
Drawing Number	296; 4040047-4; D; 16
Lead Free Status	Lead Free
RoHS Status	RoHS Compliant
Other Names	CD74HC173M CD74HC173M