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CD74HC161M

Counter ICs Hi-Sp CMOS 4-Bit Binary w/Sync Reset

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SeekIC No. : 00327203 Detail

CD74HC161M: Counter ICs Hi-Sp CMOS 4-Bit Binary w/Sync Reset

CD74HC161M Data Sheet

floor Price/Ceiling Price

US $ .25~.41 / Piece | Get Latest Price
Part Number:
CD74HC161M
Mfg:
Texas Instruments
Supply Ability:
5000

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  • Unit Price
  • $.41
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  • Processing time
  • 15 Days
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Total Cost: $ 0.00

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Product Details

Quick Details

Logic Family : CMOS Counting Sequence : Up
Operating Supply Voltage : 2 V to 6 V Package / Case : SOIC-16
Packaging : Tube    

Description

Number of Bits :
Counting Method :
Counter Type :
Operating Temperature Range :
Logic Family : CMOS
Counting Sequence : Up
Operating Supply Voltage : 2 V to 6 V
Package / Case : SOIC-16
Packaging : Tube


Features:

• 'HC161, 'HCT161 4-Bit Binary Counter, Asynchronous Reset
• 'HC163, 'HCT163 4-Bit Binary Counter, Synchronous Reset
• Synchronous Counting and Loading
• Two Count Enable Inputs for n-Bit Cascading
• Look-Ahead Carry for High-Speed Counting
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH


Pinout

Connection Diagram


Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . .. . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . .. . . .  . . .±20mA
DC Drain Current, per Output, IO
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . .. . . . .±25mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . .  . . . .±25mA
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . .±50mA


Description

Two count enables, PE and TE, in each counter are provided for n-bit cascading. In all counters reset action occurs regardless of the level of the SPE, PE and TE inputs (and the clock input, CP, in the 'HC161 and 'HCT161 types).

If a decade counter CD74HC161M is preset to an illegal state or assumes an illegal state when power is applied, CD74HC161M will return to the normal sequence in one count as shown in state diagram. The look-ahead carry feature simplifies serial cascading of the counters. Both count enable inputs (PE and TE) must be high to count.

The CD74HC161M TE input is gated with the Q outputs of all four stages so that at the maximum count the terminal count (TC) output goes high for one clock period. This TC pulse is used to enable the next cascaded stage.




Parameters:

Technical/Catalog InformationCD74HC161M
VendorTexas Instruments
CategoryIntegrated Circuits (ICs)
Logic TypeBinary Counter
Trigger TypeNegative Edge
Voltage - Supply2 V ~ 6 V
Number of Bits per Element4
Number of Elements1 - Single
DirectionUp
Mounting TypeSurface Mount
Package / Case16-SOIC (3.9mm Width)
ResetAsynchronous
PackagingTube
Operating Temperature-55°C ~ 125°C
Count Rate24MHZ
TimingSynchronous
Drawing Number296; 4040047-4; D; 16
Lead Free StatusLead Free
RoHS StatusRoHS Compliant
Other Names CD74HC161M
CD74HC161M



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