Features: • Common Clock and Asynchronous Master Reset• Positive Edge Triggering• Buffered Inputs• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Output...
CD54HCT273: Features: • Common Clock and Asynchronous Master Reset• Positive Edge Triggering• Buffered Inputs• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25• Fanout (Over Te...
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Features: • 'HC161, 'HCT161 4-Bit Binary Counter, Asynchronous Reset• 'HC163, 'HCT163 ...
Features: • 'HC161, 'HCT161 4-Bit Binary Counter, Asynchronous Reset• 'HC163, 'HCT163 ...
The 'HC273 and 'HCT273 high speed octal D-Type flip-flops with a direct clear input are manufactured with silicon-gate CMOS technology. They possess the low power consumption of standard CMOS integrated circuits.
CD54HCT273 Information at the D inputis transferred to the Q outputs on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All eight Q outputs are reset to a logic 0.