CD54HCT259

Features: • Buffered Inputs and Outputs• Four Operating Modes• Typical Propagation Delay of 15ns at VCC = 5V, CL = 15pF, TA = 25• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 1...

product image

CD54HCT259 Picture
SeekIC No. : 004311784 Detail

CD54HCT259: Features: • Buffered Inputs and Outputs• Four Operating Modes• Typical Propagation Delay of 15ns at VCC = 5V, CL = 15pF, TA = 25• Fanout (Over Temperature Range) - Standard O...

floor Price/Ceiling Price

Part Number:
CD54HCT259
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/24

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• Buffered Inputs and Outputs
• Four Operating Modes
• Typical Propagation Delay of 15ns at VCC = 5V, CL = 15pF, TA = 25
• Fanout (Over Temperature Range)
    - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55 to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
    - 2V to 6V Operation
    - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
    - 4.5V to 5.5V Operation
    - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
    - CMOS Input Compatibility, Il 1mA at VOL, VOH



Pinout

  Connection Diagram


Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . ...±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC or IGND . . . . . . . . . . . . . . . ..±50mA
 


Description

The 'HC259 and 'HCT259 Addressable Latch features the low-power consumption associated with CMOS circuitry and has speeds comparable to low-power Schottky.

This CD54HCT259 latches three active modes and one reset mode. When both the Latch Enable (LE) and Master Reset (MR) inputs are low (8-line Demultiplexer mode) the output of the addressed latch follows the Data input and all other outputs are forced low. When both MR and LE are high (Memory Mode), all CD54HCT259 outputs are isolated from the Data input, i.e., all CD54HCT259 latches hold the last data presented before the LE transition from low to high. A condition of LE low and MR high (Addressable Latch mode) allows the addressed latch's output to follow the data input; all other latches are unaffected. The Reset mode (all outputs low) results when LE is high and MR is low.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Line Protection, Backups
Audio Products
Sensors, Transducers
Programmers, Development Systems
Power Supplies - Board Mount
View more