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CD54HC75

Features: • True and Complementary Outputs• Buffered Inputs and Outputs• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads• Wide Operating Temperature Range . . . -55...

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SeekIC No. : 004311730 Detail

CD54HC75: Features: • True and Complementary Outputs• Buffered Inputs and Outputs• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Drive...

CD54HC75 Data Sheet

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Part Number:
CD54HC75
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

• True and Complementary Outputs
• Buffered Inputs and Outputs
• Fanout (Over Temperature Range)
   - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
   - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55 to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
   - 2V to 6V Operation
   - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
   - 4.5V to 5.5V Operation
   - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
   - CMOS Input Compatibility, Il 1A at VOL, VOH


Pinout

Connection Diagram


Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . .. .±20mA
DC Drain Current, per Output, IO
For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . .±25mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . .±50mA


Description

The 'HC75 and 'HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E and 2E) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E and 2E) is LOW the output is not affected.

 




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