CD54HC574

Features:

• Buffered Inputs
• Common Three-State Output Enable Control
• Three-State Outputs
• Bus Line Driving Capability
• Typical Propagation Delay (Clock to Q) = 15ns at V_CC = 5V, C_L = 15pF, T_A = 25
• Fanout (Over Temperature Range)
  - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
  - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55 to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
  - 2-V to 6-V Operation
  - High Noise Immunity: NIL = 30%, NIH = 30% of V_CC at V_CC = 5V
• HCT Types
  - 4.5-V to 5.5-V Operation
  - Direct LSTTL Input Logic Compatibility,V_IL= 0.8V (Max), V_IH = 2V (Min)
  - CMOS Input Compatibility, I_l 1A at V_OL, V_OH


Pinout




Specifications

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . .. . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . .. . . . . .±20mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . .. . . .±20mA
DC Drain Current, per Output, I_O
For -0.5V < V_O < V_CC + 0.5V. . . . . . . . . . . . . . . . . . . . . .. . .±35mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . .. . .±25mA
DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . .±50mA


Description

The 'HC374, 'HCT374, 'HC574, and 'HCT574 are octal D-type flip-flops with 3-state outputs and the capability to drive 15 LSTTL loads. The eight edge-triggered flip-flops enter data into their registers on the LOWto HIGH transition of clock (CP). The output enable (OE)controls the 3-state outputs and is independent of the register operation. When OE is HIGH, the outputs are in the high-impedance state. The 374 and 574 are identical in function and differ only in their pinout arrangements.