CD54HC30

Features:

* Buffered Inputs
* Typical Propagation Delay: 10ns at V _CC = 5V,C_L  = 15pF, T_A  = 25
* Fanout (Over Temperature Range)
   - Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
   - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
* Wide Operating Temperature Range . . . -55  to 125
* Balanced Propagation Delay and Transition Times
* Significant Power Reduction Compared to LSTTL Logic ICs
* HC Types
   - 2V to 6V Operation
   - High Noise Immunity: N_IL  = 30%, N_IH  = 30% of V_CCat V_CC = 5V
* HCT Types
   - 4.5V to 5.5V Operation
   - Direct LSTTL Input Logic Compatibility,V_IL = 0.8V (Max), V_IH  = 2V (Min)
   - CMOS Input Compatibility, I ₁ A at V_OL , V_OHl


Pinout




Specifications

DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . .....-0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . ...±20mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . ... . .±25mA
DC V_CC or Ground Current, _ICC or _IGND . . . . . . . . . . . . . . . . ..±50mA


Description

The 'HC30 and 'HCT30 each contain an 8-input NAND gate in one package. They provide the system designer with the direct implementation of the positive logic 8-input NAND function. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated cir-
cuits. CD54HC30 have the ability to drive 10 LSTTL loads. The HCT logic family is functionally pin compatible with the
standard LS logic family.