CD54HC299F3A

The CD54HC299F3A is designed as one kind of high-speed CMOS logic 8-bit universal shift register that has four synchronous-operating modes controlled by the two select inputs as shown in the mode select (S0, S1) table, and the S0, S1 and data inputs must be stable one setup time prior to the clock positive transition.

Features of the CD54HC299F3A are:(1)buffered inputs;(2)Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25 ;(3)fanout (over temperature range) standard outputs: 10 LSTTL loads and bus driver outputs: 15 LSTTL loads;(4)wide operating temperature range: -55 to +125 ;(5)balanced propagation delay and transition times;(6)significant power reduction compared to LSTTL logic ICs;(7)asynchronous reset.

The absolute maximum ratings of the CD54HC299F3A can be summarized as:(1)DC supply voltage: -0.5V to 7V;(2)DC input diode current for VI < -0.5V or VI > VCC + 0.5V: ±20 mA;(3)DC output diode current for VO < -0.5V or VO > VCC + 0.5V: ±20 mA;(4)DC output source or sink current per output pin for VO > -0.5V or VO < VCC + 0.5V: ±25 mA;(5)DC Vcc or ground current, Icc or IGND: ±50 mA. If you want to know more information such as the electrical characteristics about the CD54HC299F3A, please download the datasheet in www.seekic.com or www.chinaicmart.com .