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CD54HC280

Features: • Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25• Replaces LS180 Types• Easily Cascadable• Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loa...

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SeekIC No. : 004311667 Detail

CD54HC280: Features: • Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25• Replaces LS180 Types• Easily Cascadable• Fanout (Over Temperature Range) - Standard Outputs . . ...

CD54HC280 Data Sheet

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Part Number:
CD54HC280
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25
• Replaces LS180 Types
• Easily Cascadable
• Fanout (Over Temperature Range)
    - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55 to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
    - 2V to 6V Operation
    - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
    - 4.5V to 5.5V Operation
    - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
    - CMOS Input Compatibility, Il 1mA at VOL, VOH


Pinout

Connection Diagram


Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . ...±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC VCC or Ground Current, ICC  . . . . . . . . . . . . . . . . . . . . . . ±50mA 


Description

The 'HC280 and 'HCT280 are 9-bit odd/even parity, generator checker devices. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated (SE output is high) when an even number of data inputs is high. Odd parity is indicated (SO output is high) when an odd number of data inputs is high. Parity checking for words larger than 9 bits can be accomplished by tying the SE output to any input of an additional HC/HCT280 parity checker.




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