CD54HC165

The 'HC165 and 'HCT165 are 8-bit parallel or serial-in shiftregisters with complementary serial outputs (Q₇and Q₇)available from the last stage. When the parallel load (PL)input is LOW, parallel data from the D0 to D7 inputs areloaded into the register asynchronously. When the PL isHIGH, data enters the register serially at the DS input and
shifts one place to the right (Q₀Q₁Q₂ , etc.) with eachpositive-going clock transition. This feature allows parallel-to-serial converter expansion by typing the Q₇ output to theDS input of the succeeding device.

For CD54HC165 predictable operation the LOW-to-HIGH transition of CE
                                                                                         CE
should be LOW before the LOW-to-HIGH transition of PL toprevent shifting the data when PL goes HIGH.