DescriptionThe CD4508B dual 4-bit latch contains two identical 4-bit latches with separate STROBE,RESET,and OUTPUT DISABLE controls.With the STROBE line in the high state,the data one the D inputs appear at the corresponding Q outputs provided the DISBALE line is in the low state locks the dat...
CD4508B: DescriptionThe CD4508B dual 4-bit latch contains two identical 4-bit latches with separate STROBE,RESET,and OUTPUT DISABLE controls.With the STROBE line in the high state,the data one the D inputs...
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The CD4508B dual 4-bit latch contains two identical 4-bit latches with separate STROBE,RESET,and OUTPUT DISABLE controls.With the STROBE line in the high state,the data one the "D" inputs appear at the corresponding "Q" outputs provided the DISBALE line is in the low state locks the data into the latch.
Features of the CD4508B are:(1)two independent 4-bit latches; (2)individual master reset for each 4-bit latch; (3)3-state outputs with high-impedance state for bus line applications; (4)medium-speed operation; (5)100% tested for quiescent current at 20 V; (6)standardized, symmetrical output characteristics; (7)maximum input current of 1 uA at 18 V over full package-temperature range;100 nA at 18 V and 25.
The absolute maximum ratings of the CD4508B can be summarized as:(1): DC supply-voltage range(VDD) is -0.5 V to +20 V(voltages referenced to Vss terminal); (2): input voltage range, all inputs is -0.5 V to VDD+0.5 V; (3): DC input current, any one input is ±10 mA; (4): operating temperature range(Ta) is -55 to +125; (5): storage temperature range(Tstg) is -65 to +150.