CD4089BMS

• High Voltage Type (20V Rating)
• Cascadable in Multiples of 4 Bits
• Set to "15" Input and "15" Detect Output
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
• Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
       1V at VDD = 5V
       2V at VDD = 10V
       2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

• Numerical Control
• Instrumentation
• Digital Filtering
• Frequency Synthesis

DC Supply Voltage Range, (VDD)....-0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs ...........................................................0.5V to VDD +0.5V
DC Input Current, Any One Input ........................................................................ .±10mA
Operating Temperature Range.......................-55 to +125 Package Types D, F, K, H
Storage Temperature Range (TSTG).......................................................-65 to +150
Lead Temperature (During Soldering) ................................................................. +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum

CD4089BMS is a low power 4 bit digital rate multiplier that provides an output pulse rate that is the clock-input-pulse rate multiplied by ¹/₁₆ times the binary input. For example, when CD4089BMS binary input number is 13, there will be 13 output pulses for every 16 input pulses. CD4089BMS may be used in conjunction with an up/down counter and control logic used to perform arithmetic operations (adds, subtract, divide, raise to a power), solve algebraic and differential equations, generate natural logarithms and trigometric functions, A/D and D/A conversions, and frequency division.

For words of more than 4 bits, CD4089BMS devices may be cascaded in two different modes: an Add mode and a Multiply mode (see Figures 3 and 4). In the Add mode some of the gaps left by the more significant unit at the count of 15 are filled in by the less significant units. For example, when two units are cascaded in the Add mode and programmed to 11 and 13, respectively, the more significant unit will have 11 output pulses for every 16 input pulses and the other unit will have 13 output pulses for every 256 input pulses for a total of

11+13₌189
16 256 256

In the Multiply mode the fraction programmed into the first rate multiplier is multiplied by the fraction programmed into the second multiplier. Thus the output rate will be

11x13₌ 143
16  16   256

The CD4089BMS has an internal synchronous 4 bit counter which, together with one of the four binary input bits, produces pulse trains as shown in Figure 6. If more than one binary input bit is high, the resulting pulse train is a combination of the separate pulse trains as shown in Figure 6.

The CD4089BMS is supplied in these 16-lead outline packages:
      Braze Seal DIP       H4W
      Frit Seal DIP           H2R
      Ceramic Flatpack    H6P