DescriptionCD4073BCM AND gates provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.It is supplied in 14-lead dual-in-line ceramic package,14-lead dual-in-line plastic packages, and in chip form. CD4073BCM has many unique feat...
CD4073BCM: DescriptionCD4073BCM AND gates provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.It is supplied in 14-lead dual-in-line cera...
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CD4073BCM AND gates provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.It is supplied in 14-lead dual-in-line ceramic package,14-lead dual-in-line plastic packages, and in chip form.
CD4073BCM has many unique features: The first one is medium-speed operation.The second one is 100% tested for quiescent current at 20 V. The third one is maximum input current of 1 uA at 18 V over full pacakge-temperature range.The forth one is noise margin(full package-temperature range) is 1 V at Vdd is 5 V , 2 V at VDD is 10 V and 2.5 V at VDD is 15 V. The fifth one is standardized , symmetrical output characteristics.The sixth one is 5 V , 10 V and 15 V parametric ratings,etc.
There are some maximum raitngs about CD4073BCM. CD4073BCM DC supply-voltage range(VDD) is -0.5 V to 20 V(voltage referened to VSS terminal).Input votage range, all inputs is -0.5 V to VDD +0.5 V . DC input current,any one input is ±10 mA.Operating temperature range (Ta) is -55 to 125.Storage temperature range (Tstg) is -65 to 150.Lead temperature(during soldering) is +265(at distance 1/16 ±1/32 inch (1.59±0.79 mm) from case for 10 s max.