CD4069UBDMSR

The CD4069UBDMSR belongs to D4069UBMS family, whose types consist of six CMOS inverter circuits. These devices are intended for all general-purpose inverter applications where the medium-power TTL-drive and logic-level conversion capabilities of circuits such as the CD4009 and CD4049 Hex inverter/bulfers are not required. the CD4069UBMS is supplied in these 14 lead outline pack-ages: baze seal DIP H4H; frit seal DIP H1B; ceramic flatpack H3W.

The CD4069UBDMSR absolute maximum ratings of CD4069UBMS are (1)CD4069UBDMSR DC supply voltage range, (VDD) -05V to +20V(voltage referenced to VSS termlnals) ; (2)input voltage range, all lnputs-05V to VDD +05V; (3)DC input current, any one input±10mA; (4)maximum package power dissipation (PD) at +125°C: for TA = to +100°C (package type D,F, K): 500mW; for TA =+100°C to +125°C (package type D, F, K) derate(Linearity at 12mW/°C to 200mW ); (5)operating temperature range -55 to -125°C(Package Types D, F,K, H); (6)storage temperature range (TSTG)-65°C to +150°C ; (7)CD4069UBDMSR lead temperature (during soldering)+265°C(at distance 1/16 ± 1/32 inch (159mm ±079rnrn) from case for 10s maximum); (8)device dissipation per output transistor: 100mW(For TA = Full package temperature range (all package types)); (9)junction temperature: +175°C

The features of CD4069UBMS can be summarized as (1)CD4069UBDMSR high voltage 1ypes(20V Rating) ; (2) standardized symmetrical output characteristics ; (3)medium speed operation: tPHL, tPLH 30na (typ) at 10V ; (4)100% tested for qulescent current at 20V ; (5)CD4069UBDMSR maximum input current of 1A at 18V over full pack- ; (6)age temperature range; 100nA at 18V and +25°C; (7)CD4069UBDMSR meets all requirements of JEDEC tentative standard ; (8)No. 13B, "standard specifications for description of 'B' series CMOS Devices".