CD4046BC

The CD4046B micropower phase-locked loop (PLL) con-sists of a low power, linear, voltage-controlled oscillator (VCO), a source follower, a zener diode, and two phase comparators. The two phase comparators have a common signal input and a common comparator input. The signal input can be directly coupled for a large voltage signal, or capacitively coupled to the self-biasing amplifier at the sig-nal input for a small voltage signal.

CD4046BC Phase comparator I, an exclusive OR gate, provides a digital error signal (phase comp. I Out) and maintains 90§ phase shifts at the VCO center frequency. Between signal input and comparator input (both at 50% duty cycle), it may lock onto the signal input frequencies that are close to harmon- ics of the VCO center frequency.

CD4046BC Phase comparator II is an edge-controlled digital memory network. It provides a digital error signal (phase comp. II Out) and lock-in signal (phase pulses) to indicate a locked condition and maintains a 0§ phase shift between signal in-put and comparator input.

The linear voltage-controlled oscillator (VCO) CD4046BC produces an output signal (VCO Out) whose frequency is determined by the voltage at the VCOIN input, and he capacitor and resis-tors connected to pin C1A,C1B, R1 and R2.

The source follower output of the VCOIN (demodulator Out)CD4046BC is used with an external resistor of 10 kX or more.