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CD4040BMS

Features: * High Voltage Types (20V Rating)* Medium Speed Operation* Fully Static Operation* Buffered Inputs and Outputs* 100% Tested for Quiescent Current at 20V* Standardized Symmetrical Output Characteristics* Common Reset* 5V, 10V and 15V Parametric Ratings* Maximum Input Current of 1a at 18V ...

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SeekIC No. : 004311269 Detail

CD4040BMS: Features: * High Voltage Types (20V Rating)* Medium Speed Operation* Fully Static Operation* Buffered Inputs and Outputs* 100% Tested for Quiescent Current at 20V* Standardized Symmetrical Output Ch...

CD4040BMS Data Sheet

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Part Number:
CD4040BMS
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

* High Voltage Types (20V Rating)
* Medium Speed Operation
* Fully Static Operation
* Buffered Inputs and Outputs
* 100% Tested for Quiescent Current at 20V
* Standardized Symmetrical Output Characteristics
* Common Reset
* 5V, 10V and 15V Parametric Ratings
* Maximum Input Current of 1a at 18V Over Full Pack-age-Temperature Range;
  - 100nA at 18V and 25


Application

* Control Counters
* Timers
* Frequency Dividers
* Time-Delay Circuits


Pinout

Connection Diagram Connection Diagram Connection Diagram


Specifications

DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55 to +125
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65 to +150
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum


Description

CD4020BMS - 14 Stage
CD4024BMS - 7 Stage
CD4040BMS - 12 Stage
CD4020BMS, CD4024BMS, and CD4040BMS are ripple carry binary counters. All counter stages are master-slave
flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmit trigger action on the input-pulse line permits unlim ited rise and fall times. All inputs and outputs are buffered.

The CD4020BMS, CD4024BMS and the CD4040BMS is supplied in these 14 lead outline packages:

                                                  CD4020B            CD4024B       CD4040B
Braze Seal DIP                             H4W                    H4Q                  H4X
Frit Seal DIP                                  H1F                     H1B                  H1F
Ceramic Flatpack                           H6W                  H3W                  H6W




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