CD4028BMS

• High Voltage Type (20V Rating)
• BCD-to-Decimal Decoding or Binary-to-Octal Decoding
• High Decoded Output Drive Capability
• "Positive Logic" Inputs and Outputs - Decoded Outputs Go High On Selection
• Medium-Speed Operation:
tPHL, tPLH = 80ns (typ) at VDD = 10V
• Standardized Symmetrical Output Characteristics
• 100% Tested For Quiescent Current at 20V
• Maximum Input Current of 1A at 18V Over Full Package-Temperature Range;
100nA at 18V and +25oC
• Noise Margin (Over Full Package Temperature Range):
1V at VDD = 5V
2V at VDD = 10V
2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"

• Code Conversion
• Indication-Tube Decoder
• Address Decoding - Memory Selection Control

DC Supply Voltage Range, (VDD) ......... -0.5V to +20V (Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs .................................................................-0.5V to VDD +0.5V
DC Input Current, Any One Input ..................................................................................±10mA
Operating Temperature Range.............................. -55oC to +125oC Package Types D, F, K, H
Storage Temperature Range (TSTG) ............................................................. -65oC to +150oC
Lead Temperature (During Soldering) ..........................................................................+265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum
Thermal Resistance .................................................................................................... ja, jc
Ceramic DIP and FRIT Package ................................................................... 80oC/W ,20oC/W
Flatpack Package ... 70oC/W, 20oC/W Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K) ........................................................ 500mW
For TA = +100oC to +125oC (Package Type D, F, K) ...Derate Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor ...................................................................... 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature ................................................................................................... +175oC

CD4028BMS types are BCD-to-decimal or binary-to-octal decoders consisting of buffering on all 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the four inputs, A to D, results in a high level at the selected one of 10 decimal decoded outputs. Similarly, a 3-bit binary code applied to inputs A through C is decoded in octal code at output 0 to 7 if D = "0". High drive capability is provided at all outputs to enhance dc and dynamic performance in high fan-out applications.

The CD4028BMS is supplied in these 16-lead outline packages:
Braze Seal DIP H4S
Frit Seal DIP H1E
Ceramic Flatpack H3X