Counter Shift Registers 8-Stage Shift Reg
CD4021BCN: Counter Shift Registers 8-Stage Shift Reg
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Counting Sequence : | Serial/Parallel to Parallel | Number of Circuits : | 1 | ||
Package / Case : | PDIP-16 | Logic Family : | CD402 | ||
Logic Type : | CMOS | Number of Input Lines : | 1 / 2 | ||
Propagation Delay Time : | 350 ns, 175 ns, 140 ns | Maximum Operating Temperature : | + 125 C | ||
Minimum Operating Temperature : | - 55 C | Packaging : | Tube |
The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages. Q outputs are available from the sixth, seventh, and eighth stages. All outputs have equal source and sink current capabilities and conform to standard "B" series output drive.
When the parallel/serial control input is in the logical "0" state, data is serially shifted into the register synchronously with the positive transition of the clock. When the parallel/ serial control is in the logical "1" state, data is jammed into each stage of the register asynchronously with the clock. All CD4021BC inputs are protected against static discharge with diodes to VDD and VSS.
Technical/Catalog Information | CD4021BCN |
Vendor | Fairchild Semiconductor |
Category | Integrated Circuits (ICs) |
Logic Type | Shift Register |
Function | Parallel or Serial to Serial |
Number of Elements | 1 - Single |
Number of Bits per Element | 8 |
Output Type | Standard |
Voltage - Supply | 3 V ~ 18 V |
Mounting Type | Through Hole |
Package / Case | 16-DIP |
Packaging | Tube |
Operating Temperature | -55°C ~ 125°C |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | CD4021BCN CD4021BCN |