CD4015BC

Features: · Wide supply voltage range: 3.0V to 18V· High noise immunity: 0.45 VDD (typ.)· Low power TTL: Fan out of 2 driving 74L compatibility: or 1 driving 74LS· Medium speed operation: 8 MHz (typ.) clock rate· Fully static design: @VDD - VSS = 10VApplication• Serial-input/parallel-output ...

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CD4015BC Picture
SeekIC No. : 004311191 Detail

CD4015BC: Features: · Wide supply voltage range: 3.0V to 18V· High noise immunity: 0.45 VDD (typ.)· Low power TTL: Fan out of 2 driving 74L compatibility: or 1 driving 74LS· Medium speed operation: 8 MHz (typ...

floor Price/Ceiling Price

Part Number:
CD4015BC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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evaluate  (4.8 stars)

Upload time: 2024/11/24

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Product Details

Description



Features:

· Wide supply voltage range: 3.0V to 18V
· High noise immunity: 0.45 VDD (typ.)
· Low power TTL: Fan out of 2 driving 74L compatibility: or 1 driving 74LS
· Medium speed operation: 8 MHz (typ.) clock rate
· Fully static design: @VDD - VSS = 10V



Application

• Serial-input/parallel-output data queueing
• Serial to parallel data conversion
• General purpose register



Specifications

DC Supply Voltage (VDD . . . . . . . . . . . . . . . . . .-0.5 to +18 VDC
Input Voltage (VIN . . . . . . . . . . . . . . . . . .-0.5 to VDD +0.5 VDC
Storage Temperature Range (TS) . . . . . . . . . -65°C to +150°C
Power Dissipation (PD)
Dual-In-Line  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .700 mW
Small Outline  . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .500 mW
Lead Temperature (TL)
(Soldering, 10 seconds . . . . . . . . . . . . . . . . . . . . .  . . . .260°C



Description

The CD4015BC contains two identical, 4-stage, serialinput/ parallel-output registers with independent "Data", "Clock," and "Reset" inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A logic high on the "Reset" input resets all four stages covered by that input. All inputs are protected from static discharge by a series resistor and diode clamps to VDD and VSS.




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