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CD4006BMS

Features: • High-Voltage Type (20V Rating)• Fully Static Operation• Shifting Rates Up to 12MHz at 10V (typ)• Permanent Register Storage with Clock Line High or Low - No Information Recirculation Required• 100% Tested for Quiescent Current at 20V• Standardized, S...

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SeekIC No. : 004311149 Detail

CD4006BMS: Features: • High-Voltage Type (20V Rating)• Fully Static Operation• Shifting Rates Up to 12MHz at 10V (typ)• Permanent Register Storage with Clock Line High or Low - No Infor...

CD4006BMS Data Sheet

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Part Number:
CD4006BMS
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High-Voltage Type (20V Rating)
• Fully Static Operation
• Shifting Rates Up to 12MHz at 10V (typ)
• Permanent Register Storage with Clock Line High or Low - No Information Recirculation Required
• 100% Tested for Quiescent Current at 20V
• Standardized, Symmetrical Output Characteristics
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1A at 18V Over Full Package-Temperature Range; 100nA at 18V and +25
• Noise Margin (Full Package-Temperature Range):
  - 1V at VDD = 5V
  - 2V at VDD = 10V
  - 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standards No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"


Application

• Serial Shift Registers
• Frequency Division
• Time Delay Circuits


Pinout

Connection Diagram


Specifications

DC Supply Voltage Range, (VDD) . . . . . . . . . . .. . . . .  . . . . .  . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . . . . . . . .. . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . .. . . . . .  . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . .. . . . . . . . . . . . . . -55 to +125
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . .. . . . . . . . . .  . . . . . -65 to +150
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . .. . . . . . . . . . +265
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum


Description

CD4006BMS types are composed of 4 separate shift register sections: two sections of four stages and two sections of five stages with an output tap at the fourth stage. Each section has an independent single-rail data path.

A common clock signal is used for all stages. Data are shifted to the next stages on negative-going transitions of the clock. Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages or single register sections of 10, 12, 13, 14, 16, 17 and 18 stages can be implemented using one CD4006BMS package. Longer shift register sections can be assembled by using more than one CD4006BMS.

To facilitate cascading stages when clock rise and fall times are slow, an optional output (D1 + 4') that is delayed one-half clockcycle, is provided (see Truth Table for Output from Term. 2).

The CD4006BMS is supplied in these 14 lead outline packages:

Braze Seal DIP. . H4Q
Frit Seal DIP.... H6D
Ceramic Flatpack ..H4F




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