CD4006BM

Features:

`Wide supply voltage range ........3.0V to 15V
`High noise immunity.......... 0.45 V_DD (typ.)
`Low power TTL ........fan out of 2 driving 74L
   compatibility............. or 1 driving 74LS
`Low clock input capacitance........ 6 pF (typ.)
`Medium speed ....10 MHz (typ.) (with V<sub>DD</sub> = 10V)
`Low power
`Fully static operation


Specifications

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.

DC Supply Voltage (V_DD)........ -0.5 to +18 V_DC
Input Voltage (V_IN) ........-0.5 to V_DD + 0.5 V_DC
Storage Temperature Range (T_S) ....-65 to +150
Power Dissipation (P_D)
Dual-In-Line................... 700 mW
Small Outline................ .. 500 mW
Lead Temperature (T_L)
(Soldering, 10 seconds)............. . 260


Description

The CD4006BM/CD4006BC 18-stage static shift register is comprised of four separate shift register sections, two sections of four stages and two sections of five stages. Each section has an independent data input. CD4006BM Outputs are available at the fourth stage and the fifth stage of each section. A common clock signal is used for all stages. Data is shifted to the next stage on the negative-going transition of the clock. Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages, or single register sections of 10, 12, 13, 14, 16, 17, and 18 stages can be implemented using one package.