Features: • Enable signal is SSTL_2 compatible• Optimized for use in Double Data Rate (DDR) SDRAM applications• Designed to be used with 400 Mbps/200 MHz DDR data bus• Switch on resistance is designed to eliminate the need for series resistor to DDR SDRAM• 20 on resi...
CBTV4010: Features: • Enable signal is SSTL_2 compatible• Optimized for use in Double Data Rate (DDR) SDRAM applications• Designed to be used with 400 Mbps/200 MHz DDR data bus• Switch...
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• Enable signal is SSTL_2 compatible
• Optimized for use in Double Data Rate (DDR) SDRAM applications
• Designed to be used with 400 Mbps/200 MHz DDR data bus
• Switch on resistance is designed to eliminate the need for series resistor to DDR SDRAM
• 20 on resistance
• Internal 100 pull-down resistors
• Low differential skew
• Matched rise/fall slew rate
• Low cross-talk data-data/data-DQM
• Independent DIMM control lines
• Latch-up protection exceeds 500 mA per JESD78
• ESD protection exceeds 2000 V HBM per JESD22-A114,200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
VCC |
DC supply voltage |
0.5 to +3.3 |
V | |
VI |
DC input voltage range (S pin only)2 |
VCC + 0.3 |
V | |
IIK |
Input clamp current | VI/O < 0 |
-50 |
mA |
Tstg |
Storage temperature range |
65 to +150 |
°C | |
VI |
DC input voltage range (except S pin)2 |
0.5 to 3.3 |
V |
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51.
This 10-bit bus switch is designed for 2.3 V to 2.7 V VCC operation and SSTL_2 select input levels.
CBTV4010 Each Host port pin is multiplexed to one of four DIMM port pins.When the S pin is low the corresponding 10-bit bus switch is turned on. The on-state connects the Host port to the DIMM port through a 20 nominal series resistance. When the S pin is high the switch is open and a high-impedance state exists between the two ports. CBTV4010 DIMM port is terminated with a 100 resistor to ground when the S pin is high. The design is intended to have only one DIMM port active at any time.
The part incorporates a very low cross-talk design. CBTV4010 has a very low skew between outputs (< 50 ps) and low skew (< 50 ps) for rising and falling edges. CBTV4010 has optional performance in DDR data bus applications.
CBTV4010 Each switch has been optimized for connection to 1 or 2-bank DIMMs.
The low internal RC time constant of the switch (20 W * 7 pF) allows data transfer to be made with minimal propagation delay.The CBTV4010 is characterized for operation from 0 to +85 °C.