CB45000

The CB45000 standard cell series uses a high performance, low voltage, 5 level metal, HCMOS6 0.35 micron process to achieve subnanosecond internal speeds while offering very low power dissipation and high noise immunity.

CB45000 With an average routed logic density of 14000 gates/mm2, the CB45000 family allows the design of highly complex devices. The potential available gate count ranges above 3 Million equivalent gates. Devices can operate over a Vdd voltage range of 2.7 to 3.6 volts.

CB45000 I/O count for this array family ranges to over 750 signals and 1000 pins based upon the package technology utilized. A flexible I/O approach has been developed to provide an optimum solution for today's complex system problems of drive levels and specialized interface standards.

CB45000 offers a variable bonding approach supporting pad spacings from 80m upwards and supports staggered pad rows to address today's bonding technologies. Additional flexibility to support 65m and 50m pad spacing will be available in the near future.

CB45000 I/O can be configured for circuits ranging from low voltage CMOS and TTL to low swing differential circuits (LVDS) and the 1Gigabit per second high speed link. Standards like SCSI, 3.3 and 5 Volt PCI and other 5.0 Volt interfaces are currently being addressed.