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C167SR

Features: · High Performance 16-bit CPU with 4-Stage Pipeline· 100 ns Instruction Cycle Time at 20 MHz CPU Clock· 500 ns Multiplication (16 ´ 16 bit), 1 ms Division (32 / 16 bit)· Enhanced Boolean Bit Manipulation Facilities·Additional Instructions to Support HLL and Operating Systems·Regist...

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SeekIC No. : 004308056 Detail

C167SR: Features: · High Performance 16-bit CPU with 4-Stage Pipeline· 100 ns Instruction Cycle Time at 20 MHz CPU Clock· 500 ns Multiplication (16 ´ 16 bit), 1 ms Division (32 / 16 bit)· Enhanced Boo...

C167SR Data Sheet

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Part Number:
C167SR
Supply Ability:
5000

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  • 1~5000
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  • Processing time
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Total Cost: $ 0.00

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Product Details

Description



Features:

· High Performance 16-bit CPU with 4-Stage Pipeline
· 100 ns Instruction Cycle Time at 20 MHz CPU Clock
· 500 ns Multiplication (16 ´ 16 bit), 1 ms Division (32 / 16 bit)
· Enhanced Boolean Bit Manipulation Facilities
· Additional Instructions to Support HLL and Operating Systems
· Register-Based Design with Multiple Variable Register Banks
· Single-Cycle Context Switching Support
· Clock Generation via on-chip PLL or via direct clock input
· Up to 16 MBytes Linear Address Space for Code and Data
· 2 KBytes On-Chip Internal RAM (IRAM)
· 2 KBytes On-Chip Extension RAM (XRAM)
· Programmable External Bus Characteristics for Different Address Ranges
· 8-Bit or 16-Bit External Data Bus
· Multiplexed or Demultiplexed External Address/Data Buses
· Five Programmable Chip-Select Signals
· Hold- and Hold-Acknowledge Bus Arbitration Support
· 1024 Bytes On-Chip Special Function Register Area
· Idle and Power Down Modes
· 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
· 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 50 ns
· 16-Channel 10-bit A/D Converter with 9.7 ms Conversion Time
· Two 16-Channel Capture/Compare Units
· 4-Channel PWM Unit
· Two Multi-Functional General Purpose Timer Units with 5 Timers
· Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
· Programmable Watchdog Timer
· Up to 111 General Purpose I/O Lines, partly with Selectable Input Thresholds and Hysteresis
· Supported by a Wealth of Development Tools like C-Compilers, Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards
· On-Chip Bootstrap Loader
· 144-Pin MQFP Package (EIAJ)


Pinout

Connection Diagram


Specifications

Ambient temperature under bias (TA):
SAB-C167SR-LM...............................................................................0 to + 70 °C
SAF-C167SR-LM......................................................................... 40 to + 85 °C
SAK-C167SR-LM...................................................................... 40 to + 125 °C
Storage temperature (TST)........................................................ 65 to + 150 °C
Voltage on VCC pins with respect to ground (VSS) .......................   0.5 to + 6.5 V
Voltage on any pin with respect to ground (VSS) ..................... 0.5 to VCC + 0.5 V
Input current on any pin during overload condition ........................ 10 to + 10 mA
Absolute sum of all input currents during overload condition........................|100 mA|
Power dissipation............................................................................................1.5 W
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. During overload conditions (VIN > VCC or VIN < VSS) the voltage on pins with respect to ground (VSS) must not exceed the values defined by the Absolute Maximum Ratings.




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