C167CS-L

Features:

• High Performance 16-bit CPU with 4-Stage Pipeline
  80/60 ns Instruction Cycle Time at 25/33 MHz CPU Clock
  400/303 ns Multiplication (16 ´ 16 bit), 800/606 ns Division (32/16 bit)
  Enhanced Boolean Bit Manipulation Facilities
  Additional Instructions to Support HLL and Operating Systems
  Register-Based Design with Multiple Variable Register Banks
  Single-Cycle Context Switching Support
  16 MBytes Total Linear Address Space for Code and Data
  1024 Bytes On-Chip Special Function Register Area
• 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
• Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5), via prescaler or via direct clock input
• On-Chip Memory Modules
  3 KBytes On-Chip Internal RAM (IRAM)
  8 KBytes On-Chip Extension RAM (XRAM)
  32 KBytes On-Chip Program Mask ROM
• On-Chip Peripheral Modules
  24-Channel 10-bit A/D Converter with Programmable Conversion Time down to 7.8 ms
  Two 16-Channel Capture/Compare Units
  4-Channel PWM Unit
  Two Multi-Functional General Purpose Timer Units with 5 Timers
  Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
  Two On-Chip CAN Interfaces (Rev. 2.0B active) with 2 ´ 15 Message Objects (Full CAN/Basic CAN), can work on one bus with 30 objects
  On-Chip Real Time Clock
• Up to 16 MBytes External Address Space for Code and Data
  Programmable External Bus Characteristics for Different Address Ranges
  Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit Data Bus Width
  Five Programmable Chip-Select Signals
  Hold- and Hold-Acknowledge Bus Arbitration Support
• Idle, Sleep, and Power Down Modes with Flexible Power Management
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 111 General Purpose I/O Lines, partly with Selectable Input Thresholds and Hysteresis
• Supported by a Large Range of Development Tools like C-Compilers, Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers, Simulators, Logic Analyzer Disassemblers, Programming Boards
• On-Chip Bootstrap Loader
• 144-Pin MQFP Package


Pinout




Specifications

Parameter	Symbol	Limit Values		Unit	Notes
		min.	max.
Storage temperature	TST	65	150	°C
Junction temperature	TJ	40	150	°C	under bias
Voltage on VDD pins with respect to ground (VSS)	VDD	0.5	6.5	V
Voltage on any pin with respect to ground (VSS)	VIN	0.5	VDD + 0.5	V
Input current on any pin during overload condition		10	10	mA
Absolute sum of all input currents during overload condition			|100|	mA
Power dissipation	PDISS		1.5	W

Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. During absolute maximum rating overload conditions (V_IN > V_DD or V_IN < V_SS) the voltage on V_DD pins with respect to ground (V_SS) must not exceed the values defined by the absolute maximum ratings.


Description

The C167CS derivatives are high performance derivatives of the Infineon C166 Family of full featured single-chip CMOS microcontrollers. They combine high CPU performance (up to 16.5 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. C167CS-L also provide clock generation via PLL and various on-chip memory modules like program ROM, internal RAM, and extension RAM.