BU4015BF

Features:

1) Low power dissipation.
2) Wide range of operating power supply voltages.
3) High input impedance.
4) High fan-out.
5) Direct drive of 2 L-TTL inputs and 1 LS-TTL input.


Pinout




Specifications

Parameter	Symbol	Limits	Unit
Power supply voltage	VDD	0.3 ~ + 18	V
Power dissipation	Pd	1000 (DIP), 500 (SOP)	mW
Operating temperature	Topr	40 ~ + 85
Storage temperature	Tstg	55 ~ + 150
Input voltage	VIN	0.3 ~ VDD + 0.3	V

Description

The BU4015B and BU4015BF are 4-stage static shift registers, each consisting of two circuits.

The D flip-flops for each stage of BU4015BF share a common reset input, enabling external asynchronous reset at any point.

Also, the flip-flops at each stage of BU4015BF are triggered by the rising edge of the clock input."H" level reset input resets the contents of all stages to "L", regardless of the clock and data input, and sets data outputs Q0 to Q3 to "L".