BCM5482S

Description

A member of Broadcom's third generation of Gigabit Ethernet PHYs, the BCM5482S consists of two complete 10/100/1000BASE-T Gigabit Ethernet transceivers integrated on a single monolithic CMOS chip. The BCM5482S is optimized for low power and small footprint size to reduce design complexity for high-density uplink applications. For high-density uplink applications, the single package offers a compelling advantage over two single devices for Gigabit uplinks.

The BCM5482S DSP-based architecture and advanced power management techniques combine to achieve robust and low-power operation over existing Category 5 twisted-pair wiring. The BCM5482S architecture not only meets the requirements of IEEE 802.3, IEEE 802.3u, and IEEE 802.3ab, but also maintains the industry's highest level of margin over IEEE requirements for echo, near-end crosstalk (NEXT), and far-end crosstalk (FEXT). With the industry's lowest power at 725 mW per port, the BCM5482S assists in reducing the power distribution requirements of IP phone systems. In addition, the BCM5482S has extremely low EMI emissions, which reduces the design constraints required to meet EMI radiation specifications.