AmPAL22V10

Storage Temperature . . . . . . . . . . .  . . . . . . . . . . .  . . . . . . .  . . . . . . . . . . . .65°C to +150°C
Ambient Temperature with Power Applied  . . . . . . . . . . . . . . . . . . . . . . . . . .55°C to +125°C
Supply Voltage with Respect to Ground  . . . . . . . . . . . . . . . . . . . . . . . . . . .  0.5 V to +7.0 V
DC Input Voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 V to V_CC + 0.5 V
DC Output or I/O Pin Voltage  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to V_CC + 0.5 V
Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. Programming conditions may differ.

The AmPAL22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count.

The AmPAL22V10 device implements the familiar Boolean logic transfer function, the sum of products. The PAL device
is a programmable AND array driving a fixed OR array. The AND array is programmed to create custom product terms, while the OR array sums selected terms at the outputs.

AmPAL22V10 are connected to the fixed OR array with a varied distribution from 8 to 16 across the outputs (see Block Diagram). The OR sum of the products feeds the output macrocell. Each macrocell can be programmed
as registered or combinatorial, and active high or active low. The output configuration is determined by two fuses controlling two multiplexers in each macrocell.

AMD's FusionPLD program allows AmPAL22V10 designs to be implemented using a wide variety of popular industry-
standard design tools. By working closely with the FusionPLD partners, AMD certifies that the tools provide accurate, quality support. By ensuring that thirdparty tools are available, costs are lowered because a designer does not have to buy a complete set of new tools for each device. The FusionPLD program also greatly reduces design time since a designer can use a tool that is already installed and familiar.