Am7968

StorageTemperature . . . . . . . . . . . . 65 to +150
Ambient Temperature
Under Bias . . . . . . . . . . . . . . . . . .. . 55 to +125
Supply Voltage to Ground
Potential Continuous . . . . . . . . . .  . 0.5 V to +7.0 V
DC Voltage Applied to
Outputs . . . . . . . . . . . . . . . . . . . . 0.5 V to V_CC Max
DC Input Voltage . . . . . . . . . .  . . . . 0.5 V to +5.5 V
DC Output Current . . . . . . . . . . .. . . . . . . . . ±100 mA
DC Input Current . . . . . . . . . . . . . 30 mA to +5.0 mA

Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.

The Am7968 TAXIchip Transmitter and Am7969 TAXIchip Receiver Chipset is a general-purpose interface for very high-speed (417.5 Mbyte/s, 40175 Mbaud serially) point-to-point communications over coaxial or fiber-optic media. The TAXIchip set emulates a pseudo-parallel register. They load data into one side and output it on the other, except in this case, the "other" side is separated by a long serial link.

The speed of a Am7968 TAXIchip system is adjustable over a range of frequencies, with parallel bus transfer rates of 4 Mbyte/s at the low end, and up to 17.5 Mbyte/s at the high end. The flexible bus interface scheme of the TAXIchip set accepts bytes that are either 8, 9, or 10 bits wide. Byte transfers can be Data or Command signaling.