Am29LV001B

Storage Temperature
Plastic Packages . . . . . . . . . . . . . . . 65 to +150
Ambient Temperature
with Power Applied. . . . . . . . . . . . . . 65 to +125
Voltage with Respect to Ground
All pins except A9, OE# and RESET#
(Note 1) . . . . . . . . . . . . . . . . . . . 0.5 V to V_CC+0.5 V
VCC (Note 1). . . . . . . . . . . . . . . . . . . .0.5 V to +3.6 V
A9, OE#, and RESET# (Note 2) . . .0.5 V to +12.5 V
Output Short Circuit Current (Note 3) . . . . . . 200 mA
Notes:
1. Minimum DC voltage on input or I/O pins is 0.5 V. During voltage transitions, input or I/O pins may undershoot VSS to 2.0 V for periods of up to 20 ns. See Figure 7.  Maximum DC voltage on input or I/O pins is VCC +0.5 V. During voltage transitions, input or I/O pins may overshoot to VCC +2.0 V for periods up to 20 ns. See Figure 8.
2. Minimum DC input voltage on pins A9, OE#, and RESET# is 0.5 V. During voltage transitions, A9, OE#, and RESET# may undershoot VSS to 2.0 V for periods of up to 20 ns. See Figure 7. Maximum DC input voltage on pin A9 is +12.5 V which may overshoot to 14.0 V for periods up to 20 ns.
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
4. Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied.
Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.

The Am29LV001B is a 1 Mbit, 3.0 Volt-only Flash memory device organized as 131,072 bytes. The Am29LV001B has a boot sector architecture.

The device is offered in 32-pin PLCC and 32-pin TSOP packages. The byte-wide (x8) data appears on DQ7-DQ0.

All read, erase, and program operations are accomplished using only a single power supply. The device can also be programmed in standard EPROM programmers.

The standard Am29LV001B offers access times of 45, 55, 70, and 90 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention, the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.

Am29LV001B requires only a single power supply (2.7 V3.6V) for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.

The Am29LV001B is entirely command set compatible with the JEDEC single-power-supply Flash standard.

Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.

Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm-an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four.

Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm- an internal algorithm that automatically preprograms the  array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.

The host system can detect whether a program or erase operation is complete by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command. 

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. Am29LV001B is fully erased when shipped from the factory.

Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved in-system or via programming equipment.

The Erase Suspend feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved.

The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory.

Am29LV001B offers two power-saving features. When addresses are stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes.

AMD's Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.