Features: ARCHITECTURAL ADVANTAGES
Simultaneous Read/Write operations
- Data can be continuously read from one bank while
executing erase/program functions in other bank
- Zero latency between read and write operations
Multiple bank architectures
- Two devices available with different bank sizes (refer
to Table 3)
Secured Silicon (SecSi) Sector
- Factory locked and identifiable: 16 bytes available for
secure, random factory Electronic Serial Number;
verifiable as factory locked through autoselect
function. ExpressFlash option allows entire sector to
be available for factory-secured data.
- Customer lockable: Can be read, programmed, or
erased just like other sectors. Once locked, data
cannot be changed.
- 64 Kbyte sector size
Zero Power Operation
- Sophisticated power management circuits reduce
power consumed during inactive periods to nearly
zero
Package options
- 48-ball FBGA
Top or bottom boot block
Manufactured on 0.23 m process technology
Compatible with JEDEC standards
- Pinout and software compatible with
single-power-supply flash standard
PERFORMANCE CHARACTERISTICS
High performance
- Access time as fast 100 ns
- Program time: 13 s/word typical utilizing Accelerate function
Ultra low power consumption (typical values)
- 1 mA active read current at 1 MHz
- 5 mA active read current at 5 MHz
- 200 nA in standby or automatic sleep mode
Minimum 1 million write cycles guaranteed per sector
20 Year data retention at 125°C
- Reliable operation for the life of the system
SOFTWARE FEATURES
Data Management Software (DMS)
- AMD-supplied software manages data programming
and erasing, enabling EEPROM emulation
- Eases sector erase limitations
Supports Common Flash Memory Interface (CFI)
Erase Suspend/Erase Resume
- Suspends erase operations to allow programming in
same bank
Data# Polling and Toggle Bits
- Provides a software method of detecting the status of
program or erase cycles
Unlock Bypass Program command
- Reduces overall programming time when issuing
multiple program command sequences
HARDWARE FEATURES
Any combination of sectors can be erased
Ready/Busy# output (RY/BY#)
- Hardware method for detecting program or erase
cycle completion
Hardware reset pin (RESET#)
- Hardware method of resetting the internal state
machine to reading array data
WP#/ACC input pin
- Write protect (WP#) function allows protection of two
outermost boot sectors, regardless of sector protect status
- Acceleration (ACC) function provides accelerated
program times
Sector protection
- Hardware method of locking a sector, either
in-system or using programming equipment, to
prevent any program or erase operation within that
sector
- Temporary Sector Unprotect allows changing data in
protected sectors in-systemSpecificationsStorage Temperature
Plastic Packages . . . . . . . . . . . . . . . 65°C to +150°C
Ambient Temperature
with Power Applied . . . . . . . . 65°C to +125°C
Voltage with Respect to Ground
VCC (Note 1) . . . . . . . . . . . . . . . .0.5 V to +2.5 V
A9, OE#, and RESET#
(Note 2) . . . . . . . . . . . . . . . . . . . 0.5 V to +11 V
WP#/ACC . . . . . . . . . . . . . . . . .0.5 V to +10.5 V
All other pins (Note 1) . . . . 0.5 V to VCC +0.5 V
Output Short Circuit Current (Note 3) . . . 100 mADescriptionThe Am29DS163D family consists of 16 megabit, 1.8 volt-only flash memory devices, organized as 1,048,576 words of 16 bits each or 2,097,152 bytes of 8 bits each.
Word mode data appears on DQ0DQ15; byte mode data appears on DQ0DQ7. The device is designed to be programmed in-system with the standard 1.8 volt VCC supply, and can also be programmed in standard EPROM programmers.
The device is available with an access time of 100 and 120 ns. The devices are offered in an 48-ball FBGA package. Standard control pins-chip enable (CE#), write enable (WE#), and output enable (OE#)-control normal read and write operations, and avoid bus contention issues.
The device requires only a single 1.8 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.
Simultaneous Read/Write Operations with Zero Latency
The Simultaneous Read/Write architecture provides simultaneous operation by dividing the memory space into two banks. The device can improve overall system performance by allowing a host system to program or erase in one bank, then immediately and simultaneously read from the other bank, with zero latency.
This releases the system from waiting for the completion of program or erase operations.
Am29DS163D Features
The Secured Silicon (SecSi) Sector is an additional 64 Kbyte sector capable of being permanently locked by AMD or customers. The SecSi Sector Indicator Bit (DQ7) is permanently set to a 1 if the part is factory locked, and set to a 0 if customer lockable. This way, customer lockable parts can never be used to replace factory locked part.
Factory locked parts provide several options. The SecSi Sector may store a secure, random 16 byte ESN (Electronic Serial Number), customer code (programmed through AMD's ExpressFlash service), or both. Customer Lockable parts may utilize the SecSi Sector as bonus space, reading and writing like any other flash sector, or may permanently lock their own code there.
DMS (Data Management Software) allows systems to easily take advantage of the advanced architecture of the simultaneous read/write product line by allowing removal of EEPROM devices. DMS also allows the system software to be simplified, as it performs all functions necessary to modify data in file structures, as opposed to single-byte modifications. To write or update a particular piece of data (a phone number or configuration data, for example), the user only needs to state which piece of data is to be updated, and where the updated data is located in the system. This is an advantage compared to systems where user-written software must keep track of the old data location, status, logical to physical translation of the data onto the Flash memory device (or memory devices), and more. Using DMS, user-written software does not need to interface with the Flash memory directly.
Instead, the user's software accesses the Flash memory by calling one of only six functions. AMD provides this software to simplify system design and software integration efforts.
Am29DS163D offers complete compatibility with the JEDEC single-power-supply Flash command set standard. Commands are written to the command register using standard microprocessor write timings.
Reading data out of the device is similar to reading from other Flash or EPROM devices.
The host system can detect whether a program or erase operation is complete by using the device status bits: RY/BY# pin, DQ7 (Data# Polling) and DQ6/DQ2 (toggle bits). After a program or erase cycle is completed, the device automatically returns to reading array data.
The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory.
Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This is achieved in-system or via programming equipment.
Am29DS163D offers two power-saving features. When addresses are stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both modes.
Am29DS163D Data Sheet
