ATV2500B

• High Performance, High Density Programmable Logic Device
Typical 7 ns Pin-to-Pin Delay
Fully Connected Logic Array With 416 Product Terms
• Flexible Output Macrocell
48 Flip-Flops - Two per Macrocell
72  Sum Terms
All Flip-Flops, I/O Pins Feed In Independently
Achieves Over 80% Gate Utilization
• Enhanced Macrocell Configuration Selections
D- or T-Type Flip-Flops
Product Term or Direct Input Pin Clocking
Registered or Combinatorial Internal Feedback
• Several Power Saving Options

• Backward Compatible With ATV2500H/L Software
• Proven and Reliable High Speed UV EPROM Process
• Reprogrammable - Tested 100% for Programmability
• 40-Pin Dual-In-Line and 44-Pin Lead Surface Mount Packages

The ATV2500Bs are the highest density PLDs available in a 40- or 44-pin package. With their fully connected logic array and flexible macrocell structure, high gate utilization is easily obtainable.

The ATV2500Bs are organized around a single universal and-or array. All pin and feedback terms are always avail-able to every macrocell. Each of the 38 logic pins are array inputs, as are the outputs of each flip-flop.

In the ATV2500Bs, four product terms are input to each sum term. Furthermore, each macrocell's three sum terms can be combined to provide up to 12 product terms per sum term with no performance penalty. Each flip-flop is individually selectable to be either D- or T-type, providing further logic compaction. Also, 24 of the flip-flops may be bypassed to provide internal combinatorial feedback to the logic array.

ATV2500B Product terms provide individual clocks and asynchronous resets for each flip-flop. The flip-flops may also be individu- ally configured to have direct input pin clocking. Each out-put has its own enable product term. Eight synchronous preset product terms serve local groups of either four or eight flip-flops. Register preload functions are provided to simplify testing. All registers automatically reset upon power up.

ATV2500B Several low power device options allow selection of the optimum solution for many power-sensitive applications. Each of the options significantly reduces total system power and enhances system reliability.