ATMEGA169PA-AU

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Data Bus Width : 8 bit
Core : AVR


Pinout




Description

The ATMEGA169PA-AU is one member of the ATMEGA169PA series.The ATmega169PA is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega169PA achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

Features of the ATMEGA169PA-AU are:(1)131 powerful instructions - most single-clock cycle execution; (2)32 x 8 general purpose working registers; (3)fully static operation; (4)up to 16 MIPS Throughput at 16 MHz; (5)on-chip 2-cycle multiplier; (6)two 8-bit timer/counters with separate prescaler, one compare mode; (7)one 16-bit timer/counter with separate prescaler, compare mode, and capture mode; (8)real time counter with separate oscillator; (9)six PWM channels; (10)power-on reset and programmable brown-out detection; (11)internal calibrated RC oscillator; (12)external and internal interrupt sources.

The absolute maximum ratings of the ATMEGA169PA-AU can be summarized as:(1)voltage on any pin except RESET with respect to ground:-0.5 to Vcc+0.5V;(2)storage temperature:-65 to 150;(3)operating temperature:-55 to 125;(4)voltage on RESET with respect to ground:-0.5 to 13.0V;(5)DC current per I/O pin:40mA;(6)maximum operating voltage:6.0V;(7)DC current Vcc and GND pins:200mA.Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.The ATMEGA169PA-AU is manufactured using Atmel's high density non-volatile memory technology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use any interface to download the application program in the Application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation.