AT87F51

Features:

• Compatible with MCS-51™ Products
• 4K Bytes of User Programmable QuickFlash™ Memory
• Fully Static Operation: 0 Hz to 24 MHz
• Three-Level Program Memory Lock
• 128 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-Bit Timer/Counters
• Six Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes


Pinout




Specifications

Operating Temperature.................................. -55°C to +125°C Storage Temperature .................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-1.0V to +7.0V Maximum Operating Voltage................................................. 6.6V DC Output Current............................................................. 15.0 mA

Description

The AT87F51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of QuickFlash Programm-able Read Only Memory. The device is manufactured using Atmel's high density nonvolatile memory technology and is compatible with the industry standard MCS-51™ instruction set and pinout. The on-chip QuickFlash allows the program memory to be user programmed by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with QuickFlash on a monolithic chip, the Atmel AT87F51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.

The AT87F51 provides the following standard features: 4K bytes of QuickFlash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator and clock circuitry. In addition, the AT87F51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU whi l e a l l owing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.