Features: • Single 2.7 - 3.6V Supply
• RapidS™ Serial Interface: 40 MHz Maximum Clock Frequency (SPI Modes 0 and 3 Compatible for Frequencies Up to 33 MHz)
• Page Program
8192 Pages (528 Bytes/Page)
• Automated Erase Operations
Page Erase 528 Bytes
Block Erase 4,224 Bytes
• Two 528-byte SRAM Data Buffers Allows Receiving of Data while Reprogramming the Flash Array
• Continuous Read Capability through Entire Array
Ideal for Code Shadowing Applications
• Low-power Dissipation
10 mA Active Read Current Typical Serial Interface
8 µA CMOS Standby Current Typical
• Hardware and Software Data Protection Features
Individual Sector Locking
• Security: 128-byte Security Register
64-byte User Programmable Space
Unique 64-byte Device Identifier
• JEDEC Standard Manufacturer and Device ID Read
• 100,000 Program/Erase Cycles per Page
• Data Retention 20 years
• Commercial and Industrial Temperature Ranges
• Green (Pb/Halide-free) Packaging Options
PinoutSpecifications
Temperature under Bias .............. -55°C to +125°C
Storage Temperature .................. -65°C to +150°C
All Input Voltages (including NC Pins) with Respect to Ground ....................-0.6V to +6.25V
All Output Voltages with Respect to Ground ..............-0.6V to VCC + 0.6V
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DescriptionThe AT45DB321C is an SPI compatible, serial-interface Flash memory ideally suited for a wide var iety of digi tal voice-, image-, program code- and datastorage applications. The AT45DB321C supports a 4-wire serial interface known as RapidS for applications requiring very high speed operations. Its 34,603,008 bits of memory are organized as 8192 pages of 528 bytes each. In addition to the 33-megabit main memory, the AT45DB321C also contains two SRAM buffers of 528 bytes each.
The buffers AT45DB321C allow the receiving of data while a page in the main page Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-write operation. Unlike conventional Flash memories of AT45DB321C that are accessed randomly with multiple address lines and a parallel interface, the DataFlash uses a RapidS serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. AT45DB321C is optimized for use in many commercial and industrial applications where high-density, low-pin count, low-voltage and low-power are essential. The device operates at clock frequencies up to 40 MHz with a typical active read current consumption of 10 mA.
To allow for simple in-system reprogrammability, the AT45DB321C does not require high input voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for both the program and read operations. The AT45DB321C is enabled through the chip select pin (CS ) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK). All programming and erase cycles are self-timed.