Features: • Single 2.7V - 3.6V Supply
• Dual-interface Architecture
RapidS™ Serial Interface: 50 MHz Maximum Clock Frequency (SPI Modes 0 and 3 Compatible for Frequencies up to 33 MHz)
Rapid8™ 8-bit Interface: 20 MHz Maximum Clock Frequency
• Page Program
16,384 Pages (1,056 Bytes/Page) Main Memory
• Sector Erase Architecture
Sixty-three 270,336-byte Sectors
One 261,888-byte Sector
One 8,488-byte Sector
• Two 1056-byte SRAM Data Buffers Allows Receiving of Data while Reprogramming the Flash Array
• Continuous Read Capability through Entire Array
Ideal for Code Shadowing Applications
• Low-power Dissipation
10 mA Active Read Current Typical Serial Interface
12 mA Active Read Current Typical 8-bit Interface
15 µA CMOS Standby Current Typical
• Hardware Data Protection
• Security: 128-byte Security Register
64-byte User Programmable Space
Unique 64-byte Device Identifier
• JEDEC Standard Manufacturer and Device ID Read
• 100 Program/Erase Cycles Per Sector Minimum
• Data Retention 10 Years
• Commercial Temperature Range
PinoutSpecifications
Operating Temperature.................. -55°C to +125°C
Storage Temperature .................... -65°C to +150°C
All Input Voltages (including NC Pins) with Respect to Ground ......................-0.6V to +6.25V
All Output Voltages with Respect to Ground ................-0.6V to VCC + 0.6V
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DescriptionThe AT45CS1282 is a 2.7-volt, dual-interface sequential access Flash memory ideally suited for infrequent code shadowing applications. This device utilizes Atmel's e-STAC™ Multi-Level Cell (MLC) memory technology, which allows a single cell to store two bits of information delivering a very cost effective high density Flash memory. The AT45CS1282 supports RapidS serial interface and Rapid8 8-bit interface. RapidS serial interface is SPI compatible for frequencies up to 33 MHz. The dual-interface allows a dedicated serial interface to be connected to a DSP and a dedicated 8-bit interface to be connected to a microcontroller or vice versa. However, the use of either interface is purely optional. Its 138,412,032 bits of memory are organized as 16,384 pages of 1,056 bytes each. In addition to the 132-megabit main memory, the AT45CS1282 also contains two SRAM buffers of 1,056 bytes each. The buffers allow the receiving of data while a page in the main Memory is being reprogrammed, as well as writing a continuous data stream. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the DataFlash uses either a RapidS serial interface or a 8-bit Rapid8 interface to sequentially access its data. The simple sequential access dramatically reduces active pin count,facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial applications where high-density, low-pin count, low-voltage and low-power are essential. The device operates at clock frequencies up to 50 MHz with a typical active read current consumption of
10 mA.
To allow for simple in-system reprogrammability, the AT45CS1282 does not require high input voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for both the program and read operations. The AT45CS1282 is enabled through the chip select pin (CS) and accessed via a three-wire interface consisting ofthe Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK), or an 8-bit interface consisting of the input/output pins (I/O7 - I/O0) and the clock pin (CLK).
All programming and erase cycles are self-timed.