AT40K40LV

Features:

• Ultra High Performance
   System Speeds to 100 MHz
   Array Multipliers > 50 MHz
   10 ns Flexible SRAM
   Internal Tri-state Capability in Each Cell
• FreeRAM™
   Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM
   2,048 - 18,432 Bits of Distributed SRAM Independent of Logic Cells
• 128 - 384 PCI Compliant I/Os
   3V/5V Capability
   Programmable Output Drive
   Fast, Flexible Array Access Facilitates Pin Locking
   Pin-compatible with XC4000, XC5200 FPGAs
• 8 Global Clocks
   Fast, Low Skew Clock Distribution
   Programmable Rising/Falling Edge Transitions
   Distributed Clock Shutdown Capability for Low Power Management
   Global Reset/Asynchronous Reset Options
   4 Additional Dedicated PCI Clocks
• Cache Logic^® Dynamic Full/Partial Re-configurability In-System
   nlimited Re-programmability via Serial or Parallel Modes
   Enables Adaptive Designs
   Enables Fast Vector Multiplier Updates
   QuickChange™ Tools for Fast, Easy Design Changes
• Pin-compatible Package Options
   Plastic Leaded Chip Carriers (PLCC)
   Thin, Plastic Quad Flat Packs (LQFP, TQFP, PQFP)
   Ball Grid Arrays (BGAs)
• Industry-standard Design Tools
   Seamless Integration (Libraries, Interface, Full Back-annotation) with Concept^®, Everest, Exemplar™, Mentor^®, OrCAD^®, Synario™, Synopsys^®, Verilog^®, Veribest^®, Viewlogic^®, Synplicity^®
   Timing Driven Placement & Routing
   Automatic/Interactive Multi-chip Partitioning
   Fast, Efficient Synthesis
   Over 75 Automatic Component Generators Create 1000s of Reusable, Fully Deterministic Logic and RAM Functions
• Intellectual Property Cores
   Fir Filters, UARTs, PCI, FFT and Other System Level Functions
• Easy Migration to Atmel Gate Arrays for High Volume Production
• Supply Voltage 5V for AT40K, and 3.3V for AT40KLV



Specifications

Operating Temperature...................... -55°C to +125°C Storage Temperature ........................ -65°C to +150°C Voltage on any pin with Respect to Ground ........................-0.5V to VCC +7V Supply Voltage (VCC) .................................-0.5V to +7.0V Maximum Soldering Temp. (10 sec. @ 1/16 in.) ....250°C ESD (RZAP= 1.5K, CZAP = 100 pF)........................... 2000V

Description

The AT40K/AT40KLV is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10 ns programmable synchronous/asynchronous, dual-port/single-port SRAM, 8 global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators, and range in size from 5,000 to 50,000 usable gates. I/O counts range from 128 to 384 in industry standard packages ranging from 84-pin PLCC to 352-ball Square BGA, and support 5V designs for AT40K and 3.3V designs for AT40KLV.

The AT40K/AT40KLV is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform. Atmel's design tools provide seamless integration with industry standard tools such as Synplicity, ModelSim, Exemplar and Viewlogic.

The AT40K/AT40KLV can be used as a coprocessor for high-speed (DSP/processorbased) designs by implementing a variety of computation intensive, arithmetic functions.AT40K40LV include adaptive finite impulse response (FIR) filters, fast Fourier transforms (FFT), convolvers, interpolators and discrete-cosine transforms (DCT) that are required for video compression and decompression, encryption, convolution and other multimedia applications.