Features: * Serial Peripheral Interface (SPI) Compatible* Supports SPI Modes 0 (0,0) and 3 (1,1)* Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 1.8 (VCC= 1.8V to 3.6V)* 2.1 MHz Clock Rate* 32-Byte Page Mode* Block Write Protection Protect 1/4, 1/2...
AT25320: Features: * Serial Peripheral Interface (SPI) Compatible* Supports SPI Modes 0 (0,0) and 3 (1,1)* Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 1.8 ...
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* Serial Peripheral Interface (SPI) Compatible
* Supports SPI Modes 0 (0,0) and 3 (1,1)
* Low Voltage and Standard Voltage Operation
5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
1.8 (VCC= 1.8V to 3.6V)
* 2.1 MHz Clock Rate
* 32-Byte Page Mode
* Block Write Protection
Protect 1/4, 1/2, or Entire Array
* Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection
* Self-Timed Write Cycle (5 ms Typical)
* High Reliability
Endurance: 1 Million Write Cycles
Data Retention: 100 Years
ESD Protection: >4000V
* Automotive Grade and Extended Temperature Devices Available
* 8-Pin PDIP, JEDEC SOIC, and 14-Pin and 20-Pin TSSOP Packages
The AT25080/160/320/640 provides 8192/16384/32768/65536 bits of serial electri-cally erasable programmable read only memory (EEPROM )organized as 1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operationare essential. The AT25080/160/320/640 is available in space saving 8-pin PDIP, JEDEC SOIC, and 14-pin and
20-pin TSSOP packages.
The AT25080/160/320/640 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface con-sisting of Serial Data Input (SI), Serial Data Output (SO),and Serial Clock (SCK). All programming cycles are com-pletely self-timed, and no separate ERASE cycle is required before WRITE.BLOCK WRITE protection is enabled by programming the status register with one of four blocks of write protection.Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection of AT25320 is provided via the WP pin to protect against
inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.