EEPROM 64K 2-WIRE 4096 x 8 1.8V
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Memory Size : | 64 Kbit | Organization : | 8 K x 8 |
Data Retention : | 100 Years | Maximum Clock Frequency : | 1 MHz |
Maximum Operating Current : | 3 mA | Operating Supply Voltage : | 2.5 V, 3.3 V, 5 V |
Maximum Operating Temperature : | + 85 C | Mounting Style : | Through Hole |
Package / Case : | PDIP-8 |
The AT24C64C-PU is one member of the AT24C64C series.It has the following features including (1)schmitt trigger, filtered inputs for noise suppression;(2)write protect pin for hardware data protection;(3)32-byte page write mode (partial page writes allowed);(4)die sales: wafer form, waffle pack, and bumped wafers.
The AT24C64C provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 8192 words of 8 bits each. The AT24C64C-PU's cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C64C is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3) and, 8-ball dBGA2 packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 1.8V (1.8 to 5.5V) version.Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device.AT24C64C-PU is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
A write operation requires two 8-bit data word addresses following AT24C64C-PU address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller,must terminate the write sequence with a stop condition. At this time the EEPROM AT24C64C-PU enters an internally-timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete.
Technical/Catalog Information | AT24C64C-PU |
Vendor | Atmel |
Category | Integrated Circuits (ICs) |
Memory Type | EEPROM |
Memory Size | 64K (8K x 8) |
Speed | 400kHz, 1MHz |
Interface | I²C, 2-Wire Serial |
Package / Case | 8-DIP |
Packaging | Bulk |
Voltage - Supply | 1.8 V ~ 5.5 V |
Operating Temperature | -40°C ~ 85°C |
Format - Memory | EEPROMs - Serial |
Lead Free Status | Lead Free |
RoHS Status | RoHS Compliant |
Other Names | AT24C64C PU AT24C64CPU |