AT24C1024

Features:

• Low-voltage Operation
     2.7 (V_CC = 2.7V to 5.5V)
• Internally Organized 131,072 x 8
• 2-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bi-directional Data Transfer Protocol
• 400 kHz (2.7V) and 1 MHz (5V) Clock Rate
• Write Protect Pin for Hardware and Software Data Protection
• 256-byte Page Write Mode (Partial Page Writes Allowed)
• Random and Sequential Read Modes
• Self-timed Write Cycle (5 ms Typical)
• High Reliability
     Endurance: 100,000 Write Cycles/Page
     Data Retention: 40 Years
• 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-ball dBGA^TM Packages


Pinout




Specifications

Operating Temperature.................................. -55 to +125
Storage Temperature .....................................-65 to +150
Voltage on Any Pin
with Respect to Ground .....................................1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................ 5.0 mA


Description

The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program-mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device's cascadable feature allows up to 2 devices to share a common 2-wire bus. AT24C1024 is optimized for use in many industrial and commercial applications where low- power and low-voltage operation are essential. The AT24C1024 are available in space- saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead Leadless Array (LAP) and 8-ball dBGA packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) versions.