AT2008

Features:

·  8 full channels of ITU G.726 ADPCM
·  ADPCM coding and decoding with bypass mode
·  Per channel selectable m-Law and A-law input/output
·  Up to 8 synchronous signals for direct interface with popular combo/codec.
·  On-chip time slot assignment
·  Available internal clock generator and frame sync. generator
·  Simple 3-wire serial command port for chip configuration
·  On-chip power-up/power down/reset
·  The two clock pins (CLKA and CLKP) used as PCM/ADPCM data clocks, and the FSY pin used for Frame Sync signals can be programmed to become either as input pins or as output pins. (The defaults are as input pins).


Application

·  DECT
·  VoIP / VoDSL
·  Wireless PBX systems


Pinout




Description

 The AT2008 is an eight full-duplex channels ADPCM processor. AT2008 follows the G.726 ITU Standard for ADPCM com-pression for 40k, 32k, 24k and 16k bit rates with selectable m-law and A-law input/output. This chip can operate on 16 channels of PCM to ADPCM compression, 16 channels of ADPCM to PCM decompression, 8 channels of fullduplex operation in an 8KHz frame basis, or any combination of M-channels of compression plus N-channels of decom-pression when M+N <= 16. Using the 3-wire command serial port, each individual half-channel can be dynamically configured to perform the ADPCM algorithm at different bit rates, idle or reset of the algorithm. AT2008 can also be pro-grammed to set up different input/output time slots, or to select, (1) bypass without compression, (2) idle, or (3) reset of the algorithm.