AT-42000

Features: • High Output Power: 21.0 dBm Typical P1 dB at 2.0 GHz 20.5 dBm Typical P1 dB at 4.0 GHz• High Gain at 1 dB Compression:15.0 dB Typical G1 dB at 2.0 GHz10.0 dB Typical G1 dB at 4.0 GHz• Low Noise Figure: 1.9 dB Typical NFO at 2.0 GHz• High Gain-Bandwidth Product: ...

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AT-42000 Picture
SeekIC No. : 004290080 Detail

AT-42000: Features: • High Output Power: 21.0 dBm Typical P1 dB at 2.0 GHz 20.5 dBm Typical P1 dB at 4.0 GHz• High Gain at 1 dB Compression:15.0 dB Typical G1 dB at 2.0 GHz10.0 dB Typical G1 dB at...

floor Price/Ceiling Price

Part Number:
AT-42000
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/12

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Product Details

Description



Features:

• High Output Power:
  21.0 dBm Typical P1 dB at 2.0 GHz
  20.5 dBm Typical P1 dB at 4.0 GHz
• High Gain at 1 dB
  Compression:

  15.0 dB Typical G1 dB at 2.0 GHz
  10.0 dB Typical G1 dB at 4.0 GHz
• Low Noise Figure: 1.9 dB
   Typical NFO at 2.0 GHz
• High Gain-Bandwidth
   Product:
9.0 GHz Typical fT



Specifications

Symbol
Parameter
Units
Absolute Maximum[1]
VEBO
Emitter-Base Voltage
V
1.5
VCBO
Collector-Base Voltage
V
20
VCEO
Collector-Emitter Voltage
V
12
IC
Collector Current
mA
80
PT
Power Dissipation [2,3]
mW
600
Tj
Junction Temperature
°C
200
TSTG
Storage Temperature
°C
-65 to 200



Description

    Hewlett-Packard's AT-42000 is a general purpose NPN bipolar transistor AT-42000chip that offers excellent high frequency performance. The 4 micron emitter-to-emitter pitch enables this transistor to be used in many different functions. The 20 emitter finger interdigitated geometry yields a medium sized transistor with impedances that are easy to match for low noise and medium power applications.

    AT-42000 is designed for use in low noise, wideband amplifier, mixer and oscillator applications in the VHF, UHF, and microwave frequencies. An optimum noise match near 50 W up to 1 GHz , makes this device easy to use as a
low noise amplifier.

    The AT-42000 bipolar transistor is fabricated using Hewlett-Packard's 10 GHz fT Self-Aligned-Transistor (SAT) process. The die is nitride passivated for surface protection. Excellent device uniformity, performance and reliability are produced by the use of ionimplantation, self-alignment techniques, and gold metalization in the fabrication of this device.

    The recommended assembly procedure of AT-42000 is gold-eutectic die attach at 400oC and either wedge or ball bonding using 0.7 mil gold wire. See APPLICATIONS section, "Chip Use". 


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