Features: • Advanced CMOS Technology• Guaranteed low skew < 200pS (max)• Very low propagation delay < 2.5nS (max)• Very low duty cycle distortion < 270pS (max)• Very low CMOS power levels• Operating frequency up to 166MHz• TTL compatible inputs an...
ASM2P3805E: Features: • Advanced CMOS Technology• Guaranteed low skew < 200pS (max)• Very low propagation delay < 2.5nS (max)• Very low duty cycle distortion < 270pS (max)•...
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Rating |
Symbol |
Rating |
Unit |
Input Power Supply Voltage |
VCC |
-0.5 to +4.6 |
V |
Input Voltage |
VI |
-0.5 to +5.5 |
V |
Output Voltage |
VO |
-0.5 to VCC+0.5 |
V |
Junction Temperature |
TJ |
150 |
°C |
Storage Temperature |
TSTG |
65 to +165 |
°C |
Static Discharge Voltage (As per JEDEC STD22- A114-B) |
TDV |
2 |
KV |
The ASM2P3805E is a 3.3V clock driver built using advanced CMOS technology. The device consists of two banks of rivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The ASM2P3805E offers low capacitance inputs. The ASM2P3805E is designed for high speed clock distribution where signal quality and skew are critical. The ASM2P3805E also allows single point-to-point transmission
line driving in applications such as address distribution,where one signal must be distributed to multiple receivers with low skew and high signal quality